This invention relates to an information transfer control system and more particularly to an information transfer control system wherein information is transferred through a first-in/first-out stack.
Where an information is transferred through a first-in/first-out type stack (hereinafter abbreviated as FIFO stack) the stack is provided between one information processing device and another information processing device and acts as an efficient interface for temporarily storing the information.
To operate the FIFO stack normally two types of status signals are necessary, a FULL signal representing a state in which the FIFO stack is filled with present data and an EMPTY signal representing a state wherein there is no present data in the FIFO stack.
Although it is possible to generate signals from the FIFO stack, in the presently used FIFO stack only the FULL signal among the status signals is used to control the commencement and inhibition of the transfer of the information in response to the FULL signal.
Where there is no data in the FIFO stack it is meaningless to try to take out data from the FIFO stack. When the FIFO stack is full of data, and when looked at from the data receiving side, it is necessary to prohibit the data transmitting side from further transferring data to the FIFO, but the data transmitting side may transfer data to the receiving side (machine ready state). Accordingly, it is advantageous to rapidly transfer the data stored in the stack to the receiving side. In other words, where the status of the FIFO stack is FULL, conditions are quite different on the data transmission side and the data receiving side.
Accordingly, in a prior art information transfer control system utilizing a conventional FIFO stack it has been impossible to smoothly transfer information between the data transmitting and receiving sides. Moreover, it has been impossible to improve the efficiency of processing of the system.